Technical Specifications

Board Specification:
Half-size PCI board

Host Bus Interface:
PCI Rev. 2.1 Electrical Interface
Memory Mapped Interface

Network Interfaces:
2 T1/E1/J1 Interfaces (SW switchable)
75 Ohm, 100 Ohm, 120 Ohm, or High Impedance line termination

H.100 Interface:
32 x 2, 4, or 8 Mbit/s board-to-board highways
256 channels switchable between adapters
1024 channels switchable locally
Backwards compatible with MVIP

DSP Resources (Optional ASM Add-on Card):
Vidar-55x4-ASM: 4x TI TMS320VC5510 DSPs (400 MIPS each).
Vidar-5x4-ASM: 4 x TI TMS320C548/549 DSPs (80 MIPS each).

HDLC Resources:
Support for 1 HDLC channel/access standard.
Optional ASM cards offer support for additional HDLC channels (including support for super- and sub channels).

T1/E1 Frame Formats:
Doubleframe, CRC Multiframe
4-Frame Multiframe, 12-Frame Multiframe
Super Frame (SF), Extended Super Frame (ESF), SLC96 (72-Frame)

T1/E1 Line Codes:
HDB3, B8ZS
AMI, AMI with ZCS

T1/E1 Signaling Types:
Channel Associated (e.g. Robbed bit)
Common Channel

Clocking sources:
On-board oscillator (high stability oven-controlled oscillator option available)
Incoming T1/E1/J1 span
H.100 Clock

Phone Features:
4 Analog Interfaces (Codecs) for handset connections